make portable_simd optional

1 files changed, 56 insertions, 2 deletions

diff --git a/src/block.rs b/src/block.rs
index b485b17..bde60fc 100644
--- a/src/block.rs
+++ b/src/block.rs
@@ -1,10 +1,17 @@
 use std::ops::{BitAnd, BitOr, BitXor, Index, IndexMut, Mul, Shl, Shr};
+#[cfg(feature = "simd")]
 use std::simd::prelude::*;
 
 /// A block, the unit of work that AEZ divides the message into.
 #[derive(Default, Debug, Clone, Copy, PartialEq, Eq, Hash)]
+#[cfg(feature = "simd")]
 pub struct Block(u8x16);
 
+/// A block, the unit of work that AEZ divides the message into.
+#[derive(Default, Debug, Clone, Copy, PartialEq, Eq, Hash)]
+#[cfg(not(feature = "simd"))]
+pub struct Block([u8; 16]);
+
 impl Block {
     pub fn null() -> Block {
         Block([0; 16].into())
@@ -19,13 +26,19 @@ impl Block {
     }
 
     pub fn write_to(&self, output: &mut [u8; 16]) {
+        #[cfg(feature = "simd")]
         self.0.copy_to_slice(output);
+
+        #[cfg(not(feature = "simd"))]
+        output.copy_from_slice(&self.0);
     }
 
+    #[cfg(feature = "simd")]
     pub(crate) fn simd(&self) -> u8x16 {
         self.0
     }
 
+    #[cfg(feature = "simd")]
     pub(crate) fn from_simd(value: u8x16) -> Self {
         Block(value)
     }
@@ -102,9 +115,34 @@ impl From<u128> for Block {
 
 impl BitXor<Block> for Block {
     type Output = Block;
+    #[cfg(feature = "simd")]
     fn bitxor(self, rhs: Block) -> Block {
         Block(self.0 ^ rhs.0)
     }
+
+    #[cfg(not(feature = "simd"))]
+    fn bitxor(self, rhs: Block) -> Block {
+        // We unroll here because XOR is by far the operation that is used the most, and the
+        // int-conversion/bit-operation/int-conversion way is slower (but easier to write)
+        Block([
+            self.0[0] ^ rhs.0[0],
+            self.0[1] ^ rhs.0[1],
+            self.0[2] ^ rhs.0[2],
+            self.0[3] ^ rhs.0[3],
+            self.0[4] ^ rhs.0[4],
+            self.0[5] ^ rhs.0[5],
+            self.0[6] ^ rhs.0[6],
+            self.0[7] ^ rhs.0[7],
+            self.0[8] ^ rhs.0[8],
+            self.0[9] ^ rhs.0[9],
+            self.0[10] ^ rhs.0[10],
+            self.0[11] ^ rhs.0[11],
+            self.0[12] ^ rhs.0[12],
+            self.0[13] ^ rhs.0[13],
+            self.0[14] ^ rhs.0[14],
+            self.0[15] ^ rhs.0[15],
+        ])
+    }
 }
 
 impl Shl<u32> for Block {
@@ -124,14 +162,30 @@ impl Shr<u32> for Block {
 impl BitAnd<Block> for Block {
     type Output = Block;
     fn bitand(self, rhs: Block) -> Block {
-        Block(self.0 & rhs.0)
+        #[cfg(feature = "simd")]
+        {
+            Block(self.0 & rhs.0)
+        }
+
+        #[cfg(not(feature = "simd"))]
+        {
+            Block::from(self.to_int() & rhs.to_int())
+        }
     }
 }
 
 impl BitOr<Block> for Block {
     type Output = Block;
     fn bitor(self, rhs: Block) -> Block {
-        Block(self.0 | rhs.0)
+        #[cfg(feature = "simd")]
+        {
+            Block(self.0 | rhs.0)
+        }
+
+        #[cfg(not(feature = "simd"))]
+        {
+            Block::from(self.to_int() | rhs.to_int())
+        }
     }
 }